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Titre: Required Information For Submitting Databases to TELEDYNE DALSA Design & Product Support. Document Number: DES-0002.11 Création du document : December 22th, 2004 Bromont, Québec, Canada 2 DE 7 DES-0002.11 16 février 2011 Database Submission Form Please refer to DES-0001 “Terms and Conditions For Submitting Databases to Product Foundry” Support for more information. TELEDYNE DALSA Design and Company Name: Contact Name: Contact Phone Number: Contact Email Address: Alternate Contact Name: Alternate Contact Phone Number: Alternate Contact Email Address: DALSA Process Family Used: Technology To Be Used : CMOS 0.5um Select the right process family. Select the right technology Chip 1 Customer Device Code : GDSII File Name : Top Structrure Name : Chip 2 Customer Device Code : GDSII File Name : Top Structrure Name : Chip 3 Customer Device Code : GDSII File Name : Top Structrure Name : Special Data Generation Required ? If Yes, Please explain: No Select the right option. Magnification or Shrink Required? If Yes, Please explain: No Select the right option. Layout orientation change required? If Yes, Please explain: No Select the right option. Comments / Special Instructions Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: © Tous droits réservés 2011 / All rights reserved 2011 TELEDYNE DALSA Semiconducteur 3 DE 7 DES-0002.11 16 février 2011 - Please provide the GDSII number (s), for each mask level or design aid layers in the tables below. - Please indicate if the mask(s) need to be made or revised, indicated the Yes or No in column “Revised”. - All GDSII numbers within the submitted database should be accounted for. Use the table provided in Varia Layer Table to list any mask levels not present in the tables below or to list any design aid layers which should be used by TELEDYNE DALSA to generate mask data. - If a TELEDYNE DALSA Design Kit as be used, consult the GDSII chapter in the User Guide document for specific tehnology. CMOS / HV CMOS Layer Table Mask Level Description 10 11 12 16 18 20 21 22 24 25 26 28 29 30 33 35 40 41 44 50 51 52 53 58 59 60 70 76 77 80 86 87 96 97 -- P-Well N-Well HV_Def HV_Well N-Base Active Area P-Field N-Field Vtn Adjust Vtp Adjust Vtp Adjust 2 P-Base Poly Cap Hi Res Poly Gate P-Buried Poly Gate Hi Res N+ Diffusion N- Extended N-DDD or LDD Implant P+ Diffusion P-Extended P-Top Poly Cap Poly 3 P-DDD / LDD Implant Contacts Metal 1 Vias 1 Metal 2 Pads Vias 2 Metal 3 Vias3 Metal 4 DRL -- HV Marker GDSII Number Revised (Yes / No) Comments © Tous droits réservés 2011 / All rights reserved 2011 TELEDYNE DALSA Semiconducteur 4 DE 7 DES-0002.11 16 février 2011 CCD Layer Table Mask Level 02 10 11 12 20 23 27 28 29 30 31 32 35 40 41 43 50 51 52 53 54 55 56 57 58 59 60 61 65 70 75 76 77 80 83 84 85 86 87 90 95 96 97 99 Description GDSII Number Revised (Yes / No) Comments Zero Well Well 2 / Barrier 0 Well 3 / HV_Definition Active Area Poly 0 Buried Channel 1 Implant Buried Channel 2 Implant Channel Stop Implant Poly1 AB Implant / Nitride Definition Poly 1 Repair Poly 1 HiRes Source / Drain Implant PPD Implant PPD Implant 2 Top Side Contact Implant PPD Implant 3 Barrier 1 Poly 2 Nitride Definition 3 Poly 2 Repair Barrier 2 Buried Contact / Nitride Definition 2 Poly 3 Nitride on Poly Contacts Contacts 2 Poly 3 Repair Metal 1 Metal Resistor Vias 1 Metal 2 or Lightshield Pads Green Filter Blue Filter Red Filter Vias 2 Metal 3 Flood Microlens Vias 3 Anti Reflective Pads for Microlens © Tous droits réservés 2011 / All rights reserved 2011 TELEDYNE DALSA Semiconducteur 5 DE 7 DES-0002.11 16 février 2011 MEMS Layer Table Mask Level 01 02 04 05 06 10 11 12 13 15 16 17 18 19 20 21 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 47 48 50 52 53 54 55 56 57 58 60 61 64 70 74 75 Description GDSII Number Revised (Yes / No) Comments Marker Zero Clear Out Locos 1 Locos 2 P-Well N-Well / Buried Layer HV_Defenition Crystal Revealtant Isolation HV_Well Trench Nitride Etch 0 Nitride Etch 1 Active Area P-Field Vtn Adjust Vtp Adjust Vt Adjust 2 Trench 2 / Capacitor Implant P-Base Poly Cap Hi Res / Isolation Poly Gate / Poly 1 Anchor 0 Poly 0 P-Buried Dimple Poly Gate Hi Res Anchor 1 Poly 1 Mechanical Frame Poly Via N+ Diffusion N- Extended Anchor 2 Poly 2 Anchor 3 Poly 3 P+ Diffusion P-Top / P- Resistor Poly Cap / Poly 2 Bond Adjust Diaphragm Capacitor SiCr Reistor Poly Resistor / Barrier Contacts Contatcs 2 Waveguide / Grating Metal 1 Etch Stop Getter © Tous droits réservés 2011 / All rights reserved 2011 TELEDYNE DALSA Semiconducteur 6 DE 7 DES-0002.11 16 février 2011 Mask Level Description 76 77 80 82 84 85 86 87 88 90 94 95 96 97 99 Vias 1 Metal 2 Pads Pads 2 Polarisation Compensation Seal Ring Vias 2 Metal 3 Open Gold Bond Pad Cap Cavity / Aluminium Reflective Coating Cavity Vias 3 Metal 4 HF_Shield GDSII Number Revised (Yes / No) Comments © Tous droits réservés 2011 / All rights reserved 2011 TELEDYNE DALSA Semiconducteur 7 DE 7 DES-0002.11 16 février 2011 Varia Layer Table Mask Level Description GDSII Number Revised (Yes / No) Comments © Tous droits réservés 2011 / All rights reserved 2011 TELEDYNE DALSA Semiconducteur
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Please provide the GDSII number(s), for each mask level or design aid layers in the tables below.
Please indicate if the mask(s) need to be made or revised, indicated the Yes or No in column “Revis...