Laboratory of Electronics, Antennas and Telecommunications and

Laboratory of Electronics, Antennas and Telecommunications and

INSIS
Laboratory of Electronics, Antennas
and Telecommunications
(UMR 7248)
LEAT - Université Nice-Sophia Antipolis, UMR CNRS 7248
Campus Sophi@Tech - Bâtiment Forum
930 route des Colles, BP 145, 06903 Sophia Antipolis cedex
tél.+33.(0)4.92.38.85.71, fax.+33.(0)4.92.38.85.58 - leat.unice.fr
INSIS
Campus Sophi@Tech, Sophia Antipolis
MCSOC Team : Research activities
System Modeling and design for
Communicating Objects
Contact: Cécile Belleudy
[email protected]
LEAT - Université Nice-Sophia Antipolis, UMR CNRS 7248
Campus Sophi@Tech - Bâtiment Forum
930 route des Colles, BP 145, 06903 Sophia Antipolis cedex
tél.+33.(0)4.92.38.85.71, fax.+33.(0)4.92.38.85.58 - leat.unice.fr
MCSoC Team
Permanent Member
M. Auguin
C. Belleudy
S. Bilavarn
D. Gaffé
A. Giulieri
L. Kwiatowski
F. Muller
A. Pegatoquet
Non
Permanent
member
W. Tatinian
F.Verdier
H. Affes
B. Ouni
C. Chaabane
K. Baathi
H. Nguyen
N. Trong
C. Foucher
U. Cerasani
M. Abdelmouna
O. Mbarek
3
Research topics
HPRC
Wireless sensor
network
Autonomous
System
Projects :
GEODES, GRECO
Heterogeneous
System (MPSoC)
Multiprocessors,
reconfigurable unit.
Projects :
Openpeople, HELP,
COMCAS,
Respected, HOPE
Video application
(H262), software
radio, ...
Reconfigurable
Architecture
Auto-adaptivity
Data and code
distribution
Projects :
HARDMAHN
FOSFOR
BENEFIC
4
Axe 1 : Energy Optimization in communicating object
Objective
Model and design of low power (Energy-aware) system
Contexte
Monocore and Multicore architecture, reconfigurable unit (IP), wireless
sensor network, energy harvesting
Problematic
Low power scheduling,
System level Modeling
Approach for low power design
Dynamic Reconfiguration and energy
Power consumption management in WSN,
Temperature management for multicore SoC architecture
28-janv.-13
Modélisation et Conception Système d’Objet Communiquant
5
Embedded system : Multicores and power management
Multicores Architecture
OSoC
Low power scheduling policy for
Multicores Architectutre (DFVS, DPM)
Mem
INSTR
Configuration
Unit
Linux Implementation
=> Definition of OS services dedicated for
managing the power consumption
Outcomes :
- Approach limitation
- Applicability domain
- Definition of more realistic Policy in relation with
application domain
Example :
=> Gain : 56% on a H264 décoder
PE_1
Type 1
PE_2
Type 1
Mem
DATA
AG
Mem
DATA
AG
Reconfigurable Data Network
Mem Mem Mem Mem Mem
Instr
Mem
INSTR
AG
MMU
Main
Instruction
Memory
European Project
COMCAS
Mem
DATA
Mem
INSTR
Instr
Instr
Instr
Instr
PE_1
Type 2
I/O
ctrl
AG
I/O
Mem
I/O
ctrl
AG
I/O
Main
Data
memory
Instr
ANR Openpeople
Project
HW/SW Exploration of low power
architecture at high level (meta
model) : Adequation architecture vs
scheduling
=> Verification of requirements with
reliability
=> autonomy
=> power peak
=> average power
=> energy …
6
TLM Power architecture modeling (SystemC)
• Objective :
ANR Project : HELP- HOPE
– Simulation of SoC functional architecture and power consumption =>
components of the power architecture and control (in SystemC-TLM)
– Checking of functional and power properties
• Results :
– TLM Library : components for power (power switches, level shifters, power
controllers … abstraction of standard like UPF-CPF)
– TLM modeling tool
– Simulation tool
– Extension : Thermal aspect, 3D circuit.
Modélisation et Conception Système d’Objet Communiquant
7
Autonomous wireless sensor network
Energy harvester
Communication
Protocol vs energy
harvesting
(PHY, MAC, Routing)
ANR Project : GRECO
Definition and
implementation of
power manager
(global view) : QoS
vs Power
Heterogeneous Modeling of node :
systemC/systemC-AMS(RF)
⇒Difficulty to link model with discrete
and continuous time
=> Different level of simulation
(Accuracy)
=> Architecture exploration (energy
harvester, battery capacity, RF,
protocol)
=> Network Simulation : binding to
OMNET
Gain : 50% on data
rate
8
Axe 2 : Reconfigurable, auto-adaptive systems
Objectives : Model and design dynamic reconfigurable systems (FPGA)
Context
Auto-adaptive real time systems, High Performance Reconfigurable
Computing (HPRC)
Problematic :
• Speedup of dynamic reconfiguration
Validation of reconfigurable architectures
Design space Exploration tool
Methodology for application mapping (digital signal processing) on
heterogeneous architectures
Reference
A
B
C
D
E
Name
ReedSolomon
AES
IIR
FFT
Basic DES
9
Axe 2 : Reconfigurable, auto-adaptive systems
Project ANR FOSFOR, ARDHMAN, BENEFIC
• Developpment of IP FaRM (Fast Reconfiguration Manager) to speed up the
management of the reconfigurability
• « RecoSim » Simulator : definition of hardware/software region – Hard and soft
real time verification
• Design space exploration Methodology for reconfigurable architecture :
FoRTReSS (Flow for Reconfigurable archiTectures in Real-time SystemS) - tool
• Methodology for deploying digital signal processing applications on
heterogeneous architectures
Methods, tools and library for programming
Setting up a guide of recommendations to assess the machine which
present the best compromise for a given algorithm
10
Axe 3 : Soc Validation by synchronous approach
Objective
Behavioral formal verification of IP blocs
IP for SoC
Context
smart card : contactless, secured,
multifunction, low energy budget
Problematic
• Specification and validation with
modular synchronous languages
• Modeling and architecture of control
• Automatic Exploration of state space
governing all possible behaviors
• Verification a priori and a posteriori of
global behavior
http://webs.unice.fr/dgaffe/
recherche/clem_tools.html
11
Axe 4 : Modeling and design RF front
Objectives
Modeling and design of analog/RF system for wireless application sans
Context
wireless transmission , biomedical
Problematic
• Electrical Modeling of RF blocs, architecture exploration
• Modeling of heterogeneous systems
• Analog/digital Systems (Projet GRECO)
• Electronic and Electromagnetic systems
• Electrical/physical Systems : cochlear implant
• Analog and RF Design
•Codesign of circuits and antenna (themes CMA/S2DS2A)
12
Thank you for your visit
Question ?